26th Reconfigurable Architectures Workshop
Official website: raw.necst.it
May 20-21 2019. Rio de Janeiro, Brazil

The 26th Reconfigurable Architectures Workshop (RAW 2019) will be held in Rio de Janeiro, Brazil in May 2019. RAW 2019 is associated with the 33rd Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2019) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

Topics of interest

Architectures & CAD

  • Algorithmic Techniques and Mapping
  • Emerging Technologies (optical models, 3D Interconnects, devices)
  • Reconfigurable Accelerators
  • Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
  • FPGA-based MPSoC and Multicore
  • Distributed Systems & Networks
  • Wireless and Mobile Systems
  • Critical issues (Security, Energy efficiency, Fault-Tolerance)

Hot Topics in Reconfigurable Computing

  • Configurable Cloud
  • Heterogeneous Computing in Data Centers
  • Accelerating Data Center Workloads
  • FPGA-based Deep Learning
  • Accelerating Genomic Computations
  • Acceleration of Data Analytics
  • Reconfigurable Computing in the IoT era
  • Organic Computing, Biology-Inspired Solutions
  • Applications in Finance

Runtime & System Management

  • Run-Time Reconfiguration Models and Architectures
  • Autonomic computing systems
  • Operating Systems and High-Level Synthesis
  • High-Level Design Methods (Hardware/Software co-design, Compilers)
  • System Support (Soft processor programming)
  • Runtime Support
  • Reconfiguration Techniques (reusable artifacts)
  • Simulations and Prototyping (performance analysis, verification tools)

Paper Submission

All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript or, in special cases, may be a summary of relevant work. Manuscript for full papers should not exceed 8 single-spaced, double-column pages using 10-point size font on 8.5X11 inch pages (IEEE conference style) including references, figures and tables. Manuscript for short papers should not exceed 4 single-space, double-column pages. Papers are to be submitted through EasyChair. Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers (regular or short) will be presented at the workshop by one of the authors.


IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. Proceedings of the workshops are distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference.

Important Dates

Submission deadline January 25, 2019 January 4, 2019 February 8, 2019
Decision notification February 15, 2019 March 1, 2019
Camera-Ready papers due March 3, 2019 March 12, 2019


Workshop Chairs

  • Marco D. Santambrogio, Politecnico di Milano, Italy
  • Diana Goehringer, TU Dresden, Germany

Program Chairs

Steering Committee

  • Juergen Becker, Karlsruhe Institute of Technology, Germany
  • Viktor K. Prasanna, University of Southern California, USA
  • Ramachandran Vaidyanathan, Louisiana State University, USA

Steering Chair:

  • Viktor K. Prasanna, University of Southern California, USA

Publicity Co-Chairs

  • Brian Veale, IBM, USA
  • Ivan Beretta, University of Westminster, UK


  • Marco Rabozzi, Politecnico di Milano, Italy

Program Committee

  • Catalin Ciobanu, University of Amsterdam
  • Bruce Cockburn, University of Alberta
  • Lorenzo Di Tucci, Politecnico di Milano
  • Oliver Diessel, UNSW Sydney
  • Jeff Goeders, Brigham Young University
  • Diana Goehringer, TU Dresden
  • Guy Gogniat, Universit√© de Bretagne Sud
  • Martin Herbordt, Boston University
  • Christian Hochberger, Technische Universitaet Darmstadt
  • Michael Huebner, Brandenburg University of Technology
  • Eddie Hung, Imperial College London
  • Fenanda Lima Kastensmidt, UFRGS
  • Andreas Koch, Technische Universitaet Darmstadt
  • Dirk Koch, University of Manchester
  • Martin Langhammer, Intel
  • Qiang Liu, Tianjin University
  • Gayatri Mehta, University of North Texas
  • Nele Mentens, KU Leuven
  • Seda Ogrenci-Memik, Northwestern University
  • Dionisios Pnevmatikatos, FORTH-ICS & Technical University of Crete
  • Mario Porrmann, Bielefeld University
  • Kentaro Sano, RIKEN
  • Marco Domenico Santambrogio, Politecnico di Milano
  • Yuichiro Shibata, Nagasaki University
  • Oliver Sinnen, University of Auckland
  • Hayden So, University of Hong Kong
  • Dimitrios Soudris, National Technical University of Athens
  • Marco Rabozzi, Politecnico di Milano
  • Ramachandran Vaidyanathan, Louisiana State University
  • Brian F. Veale, IBM
  • Sara Vinco, Politecnico di Torino
  • Shaojun Wang, Harbin Institute of Technology