Heterogeneous Technology Configurable Fabrics (HTCFs) are introduced as versatile and advantageous hybrid post-CMOS platforms for next-generation reconfigurable computing. HTCFs assimilate the complementary roles of emerging and CMOS devices within an integrated reconfigurable array to impart field-programmable accessibility supporting both synthesis-time and run-time co-design among device technologies. Heterogeneous fabrics are comprised by a triad of emerging device blocks, CMOS logic blocks, and signal conversion blocks. Emerging device blocks utilize the strengths of non-volatile devices for non-charged based resistive/nanomagnetic storage for realizing Look-Up Tables (LUTs), Configurable Logic Block (CLBs), and switching blocks. CMOS logic blocks, or other logic-optimized switching device technologies, realize functional elements such as adders and multipliers to facilitate complex functions. Whereas the inter-device signal conversion requirements determined by the state-holding and state-changing mechanisms of these device blocks differ, signal conversion blocks are also be encapsulated within the fabric. Thus, devices that utilize a voltage-level representation, or alternatively magnetic orientation, having distinct switching mechanisms involving voltage, current, or magnetic fields undergo the transformations required for field-programmable accessibility. By considering programmable interconnect points integrated within a structured block, devices can be interconnected while retaining their intrinsic signal representations to realize diverse benefits. These include architecture-level advancements ranging from innovative resilience strategies to improved static versus dynamic energy profiles enabled by runtime configurability of HTCFs. Their implications to enable fresh computing paradigms, facilitate new CAD tools for emerging devices, and realize low energy IoT platforms will be discussed. In summary, the opportunity for HTCFs to enable a new orthogonal dimension in reconfigurable and evolvable hardware will be emphasized.
Ronald F. DeMara (S'87-M'93-SM'05) received the Ph.D. degree in Computer Engineering from the University of Southern California in 1992. Since 1993, he has been a full-time faculty member at the University of Central Florida where he is a Professor of Electrical and Computer Engineering, and joint faculty of Computer Science, and has served as Associate Chair, ECE Graduate Coordinator, and Computer Engineering Program Coordinator. His research interests are in computer architecture with emphasis on reconfigurable logic devices, evolvable hardware, and emerging devices, on which he has published approximately 200 articles and holds one patent. He is a Senior Member of IEEE and has served on the Editorial Boards of IEEE Transactions on VLSI Systems, Journal of Circuits, Systems, and Computers, the journal Microprocessors and Microsystems, and as Associate Guest Editor of ACM Transactions on Embedded Computing Systems, as well as a Keynote Speaker of the International Conference on Reconfigurable Computing and FPGAs (ReConFig). He is lead Guest Editor of IEEE Transactions on Computers joint with IEEE Transactions on Emerging Topics in Computing 2017 Special Section on “Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures.” He is currently an Associate Editor of IEEE Transactions on Computers, and serves on various IEEE conference program committees, including ISVLSI and SSCI. He received IEEE’s Joseph M. Bidenbach Outstanding Engineering Educator Award in 2008.