Keynote Speech

Enabling Software Engineers to Program Heterogeneous, Reconfigurable SoCs
Patrick Lysaght - Xilinx, San Jose, CA, USA
Tuesday, May 24, 2016


This talk describes a new, open-source framework for designing with Xilinx Zynq devices, a class of All Programmable Systems on Chip (APSoCs) which integrates multiple processors and Field Programmable Gate Arrays (FPGAs) into single integrated circuits.

The main goal of framework is to make it easier for designers of embedded systems to exploit the unique benefits of APSoCs in their applications. Specifically, it enables the architects, engineers and programmers who design embedded systems to exploit the capabilities of Zynq APSoCs without having to use ASIC-style, CAD tools to design programmable logic circuits. Instead the APSoC is programmed in Python and the code is developed and tested directly on the embedded system. The programmable logic circuits are imported as hardware libraries and programmed through their APIs, in essentially the same way that software libraries are imported and programmed.

The framework combines four main elements:

  • the use of a high-level productivity language, Python in this case
  • Python-callable hardware libraries based on FPGA overlays
  • a web-based architecture incorporating the open-source Jupyter Notebook infrastructure served from Zynq's embedded processors
  • Jupyter Notebook's client-side, web apps

The result is a programming environment that is web-centric so it can be accessed from any browser on any computing platform or operating system. It enables software programmers to work at higher levels of design abstraction and to re-use both software and hardware libraries. The framework is inherently extensible and integrates coherently with hardware–dependent code written in C and C++. The talk concludes with a live demonstration, an outline of areas for continued development, and a call for community participation.

About the speaker

Patrick Lysaght is a Senior Director in Xilinx Research Labs, San Jose, California. He leads a group whose research interests include system-level performance analysis, modeling, and design for heterogeneous, reconfigurable architectures. He is especially interested in emerging design methodologies based on open source technologies.

Patrick also directs the worldwide operation of the Xilinx University Program (XUP).

Before joining Xilinx, he held positions as a senior lecturer at the University of Strathclyde (Glasgow) and at the Institute for System Level Integration (Livingston, Scotland). He started his career in research and development with Hewlett Packard (Edinburgh) before going on to hold a number of technical and marketing positions.

Patrick has co-authored more than fifty technical papers, co-edited two books on programmable logic and holds ten US patents. He has served on the technical committees of numerous international conferences and is chairman of the steering committee for FPL, the world’s largest conference dedicated to field programmable logic. Two of his papers on dynamically reconfigurable logic feature among the most significant research papers of the first 25 years of FPL. Patrick holds a BSc (Electronic Systems) from the University of Limerick, Ireland and an MSc degree (Digital Techniques) from Heriot-Watt University in Edinburgh, Scotland.