33rd Reconfigurable Architectures Workshop
Official website: raw.necst.it
May 25th-26th 2026. New Orleans, USA

The 33rd Reconfigurable Architectures Workshop (RAW 2026) will be held in New Orleans, USA in May 2026. RAW 2026 is associated with the 40th Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2026) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms, applications, architectures, technologies, systems, programming models and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

Topics of interest

RAW 2026 Call for Papers

TRETS Special Issue on RAW 2026

After two successful years, we will continue to push for a journal special issue. For RAW 2026, we are collaborating with ACM TRETS to organize a journal special issue. We will invite top papers from the RAW 2026 program to extend their work and submit to the ACM TRETS special issue on RAW 2026.

Submission of Papers

All manuscripts will be reviewed by at least three members of the program committee, with a single-blind review process. Submissions may be full papers (up to 6 pages) or short papers (up to 4 pages), formatted using the IEEE conference template. : single-spaced, double-column pages using 10-point size font on 8.5X11 inch pages. The page limits exclude references and both manuscripts can include up to 2 pages of references. Templates are available:
LaTeX: here
Overleaf: here
Word: here

Papers are to be submitted through Linklings (link TBA). All papers must be submitted electronically in PDF format. Submitted papers should not have appeared in or be under submission for a different workshop, conference or journal. It is also expected that all accepted papers (full or short) will be presented at the workshop by one of the authors.

Publication and Journal Special Issue

IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. Proceedings of the workshops are distributed at the conference and submitted to IEEE Xplore. Top papers will be invited to submit extended versions to the ACM TRETS special issue on RAW 2026.

Awards

RAW 2025 will have 3 different awards:

• Best paper (selected after the presentation of the 3 best paper candidates)
• Best poster (selected among all the poster presentations at RAW 2025)
• Best artifact (see the following section for more information)

---

Call for Ph.D. Forum

The Reconfigurable Architectures Workshop (RAW) will continue with its third edition of the Ph.D Forum. The forum is an excellent opportunity for PhD students to present their research and engage with the broader reconfigurable computing community. PhD students conducting research in reconfigurable computing and related fields are invited to participate in the poster session, where they can share their work, exchange ideas, and receive feedback from experienced researchers and peers.

More information will come

---

Artifact Evaluation

RAW 2026 will continue the experimental Artifact Evaluation (AE) initiated in RAW 2023. Authors of accepted papers at RAW 2026 can optionally participate in the AE process to formally describe supporting materials (code, data, models, workflows, results).

Artifacts are digital objects that were created by the authors as part of the research or experiments performed with the submitted work. Examples of artifacts are:

• Software: models, source code, scripts, Makefiles, container images (like Docker files), etc.
• Hardware: Verilog, VHDL, schematics, CAD tools, flows, etc.
• Data: spreadsheets, databases, binary files, design sets, etc.

High-quality artifacts are as important as the manuscript itself. The goal of submitting artifacts promotes the availability and reproducibility of the experimental results and data such that other researchers can repeat experiments and replicate results with less effort.

Note that this submission is voluntary and will not influence the final decision regarding the papers. The goal is to help the authors validate experimental results from their accepted papers by an independent AE Committee (AEC) in a collaborative way while helping readers find articles with available (i.e., publicly accessible in an archival repository), functional (i.e., consistent, documented, and reusable), and validated (i.e., main results from the paper) artifacts.

Each submitted artifact is evaluated by at least two members of the AEC. During the process, authors and evaluators are allowed to communicate anonymously with each other to overcome technical difficulties. Ideally, we hope to see all submitted artifacts successfully pass the artifact evaluation. More details on the AE process will follow, and in the meantime check the FAQ.

Finally, we are seeking volunteers to take part in the AE Committee. If you are interested in taking part in this initiative please consider submitting your candidacy or those of your students. Please contact the Program Chairs. A form will be shared ahead of time.

Organization

Workshop Chair

• Marco Domenico Santambrogio, Politecnico di Milano, Italy

Program Co-Chairs

• Atefeh Sohrabizadeh, NVIDIA, California
• Davide Conficconi, Politecnico di Milano, Italy

Steering Committee

• Juergen Becker, Karlsruhe Institute of Technology, Germany
• Viktor K. Prasanna, University of Southern California, USA
• Ramachandran Vaidyanathan, Louisiana State University, USA
• Marco D. Santambrogio, Politecnico di Milano, Italy

Steering Chair

• Viktor K. Prasanna, University of Southern California, USA

Artifact Evaluation Chair

• Francesco Peverelli, Huawei Research, Switzerland

PhD Forum Chair

• Coming Soon

Publicity Co-Chairs

• Brian Veale, IBM, USA
• Christian Pilato, Politecnico di Milano, Italy

Webmaster

• Laura Ginestretti, Politecnico di Milano, Italy