New Orleans

27th Reconfigurable Architectures Workshop
Official website: raw.necst.it
May 18 2020. New Orleans, USA

» Call for papers

The 27th Reconfigurable Architectures Workshop (RAW 2020) will be held in New Orleans, USA in May 2020. RAW 2020 is associated with the 34rd Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2020) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the oldest platforms and a vibrant forum for researchers to present new ideas, fresh results, and on-going research into both theoretical and practical advances including novel innovations in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area. This year the workshop will also provide a platform for work in progress.

Topics of interest

Hot Topics

  • Configurable Cloud
  • Heterogeneous Computing in Data Centers
  • Accelerating Data Center Workloads
  • FPGA-based Deep Learning
  • Accelerating Genomic Computations
  • Accelerating Data Analytics
  • Reconfigurable Computing in the IoT era
  • Organic Computing, Biologically-Inspired Solutions
  • Applications in Finance

Architectures & CAD

  • Algorithmic Techniques and Mapping
  • Emerging Technologies (optical models, 3D Interconnects, devices)
  • Reconfigurable Accelerators
  • Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
  • FPGA-based MPSoC and Multicore
  • Distributed Systems & Networks
  • Wireless and Mobile Systems
  • Critical issues (Security, Energy efficiency, Fault-Tolerance)

Runtime/System Management

  • RunTime Reconfiguration Models
  • Autonomic computing systems
  • Operating Systems and High-Level Synthesis
  • High-Level Design Methods (Hardware/Software co-design, Compilers)
  • System Support (Soft processor programming)
  • Runtime Support
  • Reconfiguration Techniques (reusable artifacts)
  • Simulations and Prototyping (performance analysis, verification tools)

Paper Submission

All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript or, in special cases, may be a summary of relevant work. Manuscripts for full papers should not exceed 8 single-spaced, double-column pages using 10-point font on 8.5 x 11 inch pages (IEEE conference style) including references, figures and tables. Manuscripts for short papers should not exceed 4 single-space, double-column pages. Papers are to be submitted through EasyChair. Submitted papers should not have appeared in or be under consideration for another workshop, conference or journal. It is also expected that all accepted papers (regular or short) will be presented at the workshop by one of the authors.

Publication

IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. Proceedings of the workshops are distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference.

Important Dates

Submission deadline January 25, 2020
Decision notification February 15, 2020
Camera-Ready papers due March 2, 2020

Organization

Workshop Co-Chairs

Program Co-Chairs

  • Oliver Diessel, University of New South Wales, Australia
  • Christophe Bobda, University of Arkansas, USA

Steering Committee

  • Juergen Becker, Karlsruhe Institute of Technology, Germany
  • Viktor K. Prasanna, University of Southern California, USA
  • Ramachandran Vaidyanathan, Louisiana State University, USA

Steering Chair

  • Viktor K. Prasanna, University of Southern California, USA

Publicity Co-Chairs

  • Brian Veale, IBM, USA
  • Ivan Beretta, University of Westminster, UK

Webmaster

  • Marco Rabozzi, Politecnico di Milano, Italy

Program Committee (to be confirmed)

  • Alexander Kroh, UNSW Sydney
  • Andreas Koch, Technische Universitaet Darmstadt
  • Brian F. Veale, IBM
  • Bruce Cockburn, University of Alberta
  • Catalin Ciobanu, University of Amsterdam
  • Christian Hochberger, Technische Universitaet Darmstadt
  • Diana Goehringer, TU Dresden
  • Dimitrios Soudris, National Technical University of Athens
  • Dionisios Pnevmatikatos, FORTH-ICS & Technical University of Crete
  • Dirk Koch, University of Manchester
  • Eddie Hung, Imperial College London
  • Fernanda Lima Kastensmidt, UFRGS
  • Gayatri Mehta, University of North Texas
  • Guy Gogniat, Université de Bretagne Sud
  • Hayden So, University of Hong Kong
  • Jeff Goeders, Brigham Young University
  • Kentaro Sano, RIKEN
  • Lingli Wang, State Key Laboratory of ASIC & System, Fudan University
  • Lorenzo Di Tucci, Politecnico di Milano
  • Marco Domenico Santambrogio, Politecnico di Milano
  • Marco Rabozzi, Politecnico di Milano
  • Mario Porrmann, Bielefeld University
  • Martin Herbordt, Boston University
  • Martin Langhammer, Intel
  • Michael Huebner, Brandenburg University of Technology
  • Nele Mentens, KU Leuven
  • Oliver Diessel, UNSW Sydney
  • Oliver Sinnen, University of Auckland
  • Qiang Liu, Tianjin University
  • Ramachandran Vaidyanathan, Louisiana State University
  • Sara Vinco, Politecnico di Torino
  • Seda Ogrenci-Memik, Northwestern University
  • Shaojun Wang, Harbin Institute of Technology
  • Yuichiro Shibata, Nagasaki University