StPetersburg

30th Reconfigurable Architectures Workshop
Official website: raw.necst.it
May 2023. St. Petersburg, Florida USA

The 30th Reconfigurable Architectures Workshop (RAW 2023) will be held in St. Petersburg, Florida USA in May 2023. RAW 2023 is associated with the 37th Annual IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2023) and is sponsored by the IEEE Computer Society and the Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

Topics of interest

Hot Topics

  • Configurable Cloud
  • Heterogeneous Computing in Data Centers
  • Accelerating Data Center Workloads
  • FPGA-based Deep Learning
  • Accelerating Genomic Computations
  • Accelerating Data Analytics
  • Reconfigurable Computing in the IoT era
  • Organic Computing, Biologically-Inspired Solutions
  • Applications in Finance

Architectures & CAD

  • Algorithmic Techniques and Mapping
  • Emerging Technologies (optical models, 3D Interconnects, devices)
  • Reconfigurable Accelerators
  • Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
  • FPGA-based MPSoC and Multicore
  • Distributed Systems & Networks
  • Wireless and Mobile Systems
  • Critical issues (Security, Energy efficiency, Fault-Tolerance)

Runtime/System Management

  • RunTime Reconfiguration Models
  • Autonomic computing systems
  • Operating Systems and High-Level Synthesis
  • High-Level Design Methods (Hardware/Software co-design, Compilers)
  • System Support (Soft processor programming)
  • Runtime Support
  • Reconfiguration Techniques (reusable artifacts)
  • Simulations and Prototyping (performance analysis, verification tools)

Paper Submission

All manuscripts will be reviewed by at least three members of the program committee in a single blind review process. Submissions reporting your latest results, exciting developments and, in special cases, summaries of relevant work are sought. Authors are highly encouraged to submit a demo of their work and provide source code/relevant material to reproduce the paper’s results. Manuscripts for full papers should not exceed 8 single-spaced, double-column pages using 10-point font on 8.5 x 11 inch pages (IEEE conference style) including references, figures and tables. Manuscripts for short papers should not exceed 4 single-space, double-column pages. Papers are to be submitted through EasyChair. Submitted papers should not have appeared in or be under consideration for another workshop, conference or journal. It is also expected that all accepted papers (regular or short) will be presented at the workshop by one of the authors.

Instructions For Authors

Please follow the instructions on the IPDPS website for the Camera-Ready paper submission. The paper ID is the number of the authors' submission, the acronym of the workshop is RAW.
In 2023 RAW will celebrate the 30th anniversary, by giving authors the opportunity to submit for evaluation artifacts that accompany their research work. This year this will be a first experiment in this direction. A paper is more than the document itself; it is made o a constellation of artifacts: code, data sets, models, test suites, benchmarks, and others. High-quality artifacts are important as the manuscript itself. Indeed they are needed to reproduce experimental results and build on top of others' research. Because of this context, we are opening a special call for artifacts. Authors of accepted RAW 2023 papers are invited to formally describe supporting materials (code, data, models, workflows, results) to the Artifact Evaluation (AE) process, and for any issue, communicate with the Artifacts Chair.
Note that this submission is voluntary and will not influence the final decision regarding the papers. The goal is to help the authors validate experimental results from their accepted papers by an independent AE Committee in a collaborative way while helping readers find articles with available (i.e., publicly accessible in an archival repository), functional (i.e., consistent, documented, and reusable), and validated (i.e., main results from the paper) artifacts! Each submitted artifact is evaluated by at least two members of the AE committee. During the process, authors and evaluators are allowed to communicate anonymously with each other to overcome technical difficulties. Ideally, we hope to see all submitted artifacts successfully pass the artifact evaluation. More details on the AE process will follow.

Publication

IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. Proceedings of the workshops are distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference.

Important Dates

Submission deadline: January 23, 2023 February 10, 2023
Decision notification: February 14, 2023 March 1, 2023
Camera-Ready papers due: February 28, 2023 March 7, 2023

Organization

Workshop Chair

Program Chair

  • Lana Josipović, ETH Zurich, Switzerland

Steering Committee

  • Juergen Becker, Karlsruhe Institute of Technology, Germany
  • Viktor K. Prasanna, University of Southern California, USA
  • Ramachandran Vaidyanathan, Louisiana State University, USA

Steering Chair

  • Viktor K. Prasanna, University of Southern California, USA

Artifacts Chair

  • Davide Conficconi, Politecnico di Milano, Italy

Publicity Co-Chairs

  • Brian Veale, IBM, USA
  • Dirk Stroobandt, Ghent University, Belgium
  • Yukinori Sato, Toyohashi University of Technology, Japan

Webmaster

  • Francesco Peverelli, Politecnico di Milano, Italy

Program Committee

  • Antonio Miele, Politecnico di Milano
  • Bruce Cockburn, University of Alberta
  • Catalin Bogdan Ciobanu, University of Amsterdam
  • Christian Hochberger, TU Darmstadt
  • Davide Conficconi, Politecnico di Milano
  • Dennis Gnad, Karlsruhe Institute of Technology
  • Diana Goehringer, TU Dresden
  • Dimitrios Soudris, National Technical University of Athens
  • Dionisios Pnevmatikatos, National Technical University of Athens
  • Emanuele Del Sozzo, RIKEN Center for Computational Science
  • Francesc Fons, Huawei Technologies
  • Francesco Peverelli, Politecnico di Milano
  • Jo Vliegen, Katholieke Universiteit Leuven
  • John Wickerson, Imperial College London
  • Jürgen Becker, Karlsruhe Institute of Technology
  • Lana Josipovic, ETH Zurich
  • Lorenzo Di Tucci, Huxelerate SRL
  • Marco Domenico Santambrogio, Politecnico di Milano
  • Mario Porrmann, Osnabrueck University
  • Martin Herbordt, Boston University
  • Martin Langhammer, Intel
  • Michael Huebner, Brandenburg University of Technology Cottbus
  • Oliver Sinnen, University of Auckland
  • Qiang Liu, Tianjin University
  • Ramachandran Vaidyanathan, Louisiana State University
  • Shaojun Wang, Harbin Institute of Technology
  • Tomohiro Ueno, RIKEN Center for Computational Science
  • Viktor Prasanna, University of Southern California
  • Yasunori Osana, University of the Ryukyus
  • Yuichiro, Nagasaki University
  • Yukinori Sato, Toyohashi University of Technology